Dokumentenidentifikation EP0914711 27.07.2000
EP-Veröffentlichungsnummer 0914711
Anmelder Dynamic Precision, Kjeller, NO
Erfinder ALEXANDERSEN, Olaf, Rune, N-0673 Oslo, NO
Vertreter derzeit kein Vertreter bestellt
DE-Aktenzeichen 69702348
Vertragsstaaten AT, BE, CH, DE, DK, ES, FI, FR, GB, IE, IT, LI, LU, NL, PT, SE
Sprache des Dokument EN
EP-Anmeldetag 18.07.1997
EP-Aktenzeichen 979309069
WO-Anmeldetag 18.07.1997
PCT-Aktenzeichen NO9700187
WO-Veröffentlichungsnummer 9805119
WO-Veröffentlichungsdatum 05.02.1998
EP-Offenlegungsdatum 12.05.1999
EP date of grant 21.06.2000
Veröffentlichungstag im Patentblatt 27.07.2000
IPC-Hauptklasse H03F 3/30


The present invention relates to a power amplifier of the type indicated in the preamble of the appended patent claim 1. More particularly the invention is primarily intended for use when delivering high output power in a frequency range 0 to 100 kHz, i.e. power without upper limit, however often in a range 50 to 2000 W, for driving resistive and reactive loads like loudspeakers, motors and other transducer types.

Related art is known from US 3,808,545, US 4,611,180, US 5,179,352 and GB 1,584,941. Among these, particularly US 5,179,352, however partially also GB 1,584,941, relate to a signal correction technique similar to a technique which is also utilized in embodiments of the present invention. US 3,808,545 relates to a power amplifier which exhibits circuitry having features which are also utilized in embodiments of the power amplifier in accordance with the present invention, with a bridge connection and grounding of the output terminal of the output amplifier stage.

The more usual power amplifier constructions consist of:

  • An input stage.
  • A voltage amplifier stage.
  • A current amplifier stage.

The task of the input stage is usually to change the operating point of the signals from around ground to around one or both of the supply voltages.

The voltage amplifier stage is intended to increase the signal voltage to a level that can provide a full output from the current amplifier stage.

The current amplifier stage usually has a voltage gain somewhat less than 1, and a current gain that is sufficient to isolate the load from the voltage amplifier stage.

When high power is desirable, one should use a higher supply voltage for the voltage amplifier stage than for the current amplifier stage, to be able to get the highest possible power from the current supply for this stage. (The voltage amplifier stage must be able to drive the current amplifier stage into saturation.) This puts restrictions on the input stage, in which one either has to choose components in accordance with their ability to withstand voltage, instead of e.g. their noise characteristics, or one has to increase complexity by e.g. connecting components in series.

Great demands are also made on the voltage amplifier stage. The transistors in this stage must stand up to the full supply voltage, and since this stage is critical as regards the linearity of the amplifier, such a large current will often run through it, that these transistors will heat up and require local cooling. This may have the effect that the product is thermally more unstable, and it may also have an unfortunate influence on the product lifetime.

The present invention has been conceived to remedy the above mentioned drawbacks. This is achieved by providing a power amplifier of the type stated in the preamble of claim 1, and which has the special characteristics stated in the characterizing portion of claim 1. Further advantageous embodiments of the power amplifier in accordance with the invention is achieved by adding the features appearing in the attached dependent claims.

The invention provides the following advantages in comparison with previously known power amplifiers:

  • A low supply voltage for all stages up to the current amplifier stage, has the effect that all components may be selected in accordance with their small signal characteristics, such as signal/noise ratio, bandwidth and temperature stability.
  • A low power dissipation in the same components leads to increased reliability and thermal stability.
  • A lower distortion is achieved, since there are no transistors with a large voltage swing in the stages up to the current amplifier stage. (These will result in distortion due to voltage dependent capacitances.)
  • Fewer components result in a lower error rate and improved reliability.
  • It is possible to use a standardized solution: All stages up to the current amplifier stage are the same, independent of the output power, and this simplifies storage and service operations.
  • In most cases it is possible to ground the cooled electrode of all or half of the output transistors, which simplifies the mounting thereof, lowers the risk of errors and improves the cooling effect.

The invention shall now be explained in closer detail by going through embodiment examples, and at the same time referring to the appended drawings, where

  • fig. 1 shows a first embodiment of a power amplifier in accordance with the invention, in a simplified circuit diagram, and
  • fig. 2 shows a second embodiment of a power amplifier in accordance with the invention.

In fig. 1, A1 and A2 are amplifier circuits with voltage input signals and current output signals. In itself A1 may represent a complete input stage, or a last amplifier stage in a more comprehensive input stage, where only this last amplifier A1 is shown in the figure. Thus, the input voltage Ui results in an output signal from amplifier A1 which is the signal current Iin in position 3 in the circuit diagram. In principle it is possible to utilize the circuit without the correction amplifier A2, but this will require that the end stage consisting of A3, PA1 and PA2, is "perfect" in the sense that the voltage drop between position 3 and position 7 in the circuit diagram is equal to zero. In a practical case, there will be a voltage difference between positions 3 and 7, and the task of the amplifier A2 is to make corrections in this respect.

A3 is an amplifier having unity voltage gain, high input impedance and low output impedance. The high input impedance of A3 causes the current signal Iin, possibly supplemented with a correction current signal Ikorr from amplifier A2, to flow through resistor R (bypass resistor), voltage V being developed across this resistor.

PA1 and PA2 are power converters, possibly consisting of three or more power transistors (or tubes), and they require an input signal between 0,5 and 12 volts peak voltage to provide maximum output current, all depending on what configuration and which kind of transistors is used.

PS1 and PS2 are similar voltage supplies arranged floatingly in relation to signal earth.

A voltage signal Ui on input terminals 1, 2 of A1 will provide a current signal Iin which will set up a voltage signal V across the bypass resistor R (using the non-grounded terminal 6 of the load as a zero point). This leads to an input voltage for A3 and a current in PA1 or PA2. This current will pass through current supply PS1 or PS2, to the load LOAD and flow therethrough. This current will provide a voltage across the load which is equal to the voltage V across resistor R, except for the input voltage of PA1 and PA2. Since this voltage varies in a non-linear manner with the output current, distortion will be caused. In order to compensate for this effect, the voltage signal is measured at the input of A3 by means of the correction amplifier A2. The correction amplifier A2 delivers a current signal Ikorr to the resistor R, which establishes a voltage thereacross equal to the input voltage present at any moment for A3 (which input voltage is equal to the voltage input to PA1 and PA2). In order to make this work, the correction amplifier A2 must have a transconductance g equal to the inverse of the resistance of bypass resistor R. (It shall be noted that the transconductance g is defined as the ratio of the amplifier output current and its input voltage.) The total voltage signal across resistor R will then be that which is caused by the input signal plus the A3 input signal. (The voltage across the resistor is the sum of the currents therethrough multiplied by the resistor resistance.)

This has the effect that the portion of the voltage signal V across bypass resistor R which has been caused by the input signal, exactly corresponds to the voltage across the load. The non-linearities in PA1 and PA2 are cancelled.

It is to be specially noted that the output terminal 7 from the end stage A3, PA1, PA2 is grounded. This requires that the voltage supply must be arranged as a floating voltage supply. This is no problem in mains-operated equipment, position 6 may e.g. represent a center position on the secondary side of a mains transformer.

One result of the feature that the end stage output 7 is grounded, is that a lower voltage swing is achieved in position 3 in the circuit diagram. If instead position 6, i.e. the other load terminal, were grounded in a conventional manner, the voltage swing in position 3, that is on the end stage input, would be the same as, or somewhat larger than the voltage swing across the load LOAD. This would make great demands on the input stage A1, since the voltage swing across the load may be more than 100 volts for large power values. (At the outset this involves power amplifiers for delivery of high power, as mentioned in the introduction.) An exemplary amplifier delivering 400 W in an 8 ohm load, gives a peak voltage of 80 volts. Then, in the conventional case, the input stage A1 would have to deliver +/- 80 volts, plus margins and saturation voltages. Amplifiers using such an input stage with voltage supplies of +/- 120 volts are previously known and in use.

If instead position 7 is grounded, such as in the present invention, only a standard +/- 12 volts or +/- 15 volts current supply is required for the input stage A1, irrespective of output power. This lessens the demands for component selection in the input amplifier A1, the reliability thereof will increase due to less heat development, etc.

The end stage amplifier A3 is in practice a voltage controlled current amplifier. Depending on the design of that amplifier, it will require from 2 to 10 volts voltage difference between positions 3 and 7 in the circuit diagram to deliver full current. This voltage will add to the voltage in position 7, and make demands on the voltage swing out from input stage A1. It is important that the bias current into A3 is so small that it will be of no importance relative to Iin. The error correction provided by correction amplifier A2 provides for equalizing the position 3 voltage to the position 7 voltage.

A special further effect of the amplifier circuit is the combination of current gain and voltage gain in one and the same end stage, by amplifying voltage via resistor R, while A3, PA1 and PA2 attend to the current amplification. Thus, in principle the input signal Ui is converted to a current which in its turn is converted to a voltage across a resistor having the non-grounded terminal of the load as an end point/reference. In principle, the current amplifier stage output is also grounded, and the current through the load is controlled via the current supply. An important effect that is achieved, is that the current amplifier stage exhibits a minimum voltage swing on its input side.

It is now referred to fig. 2. Fig. 2 is similar to fig. 1 except from the current supply layout, i.e. the right hand side of the diagram. The circuit solution involving A1, A2, A3, PA1 and PA2, remains unchanged. However, instead of connecting the non-grounded terminal 6 of the load to the mid-point between two identical, floating voltages, it is connected to the output from a slave amplifier A4, PA3, PA4. The slave amplifier has the task to utilize the full voltage potential of the current supply unit PS3. It is organized as a very simple feedback amplifier with a voltage amplifier stage A4 and power stages PA3 and PA4, configured almost like a mirror image of the end stage A3, PA1, PA2. The slave amplifier input is referred to the half of the voltage across the current supply unit PS3, by means of two identical resistors, R3 and R4. The gain is given by the resistance of resistors R1 and R2, according to the formula A = 1 + R2/R1. The slave amplifier input signal is the movement of the current supply unit in relation to earth, measured via R3 and R4. The slave stage gain is often adjusted to somewhat above 2, as it is desirable that this stage is saturated only for large signal amplitudes, to utilize as well as possible the voltage of the current supply unit. Voltage clipping or harmonic distortion in the slave stage will not result in increased distortion of the output signal, since this lies outside the reference for the main amplifier A3, PA1, PA2, namely the interconnection point 6 between the resistor R and the load LOAD, and position 7 which is connected to the inverting input of A2.

The assembly of the current supply unit PS3, the four resistors R1-R4, the voltage amplifier A4 and the slave power stages PA3 and PA4 constitute an embodiment of a current supply circuitry in analogy with the current supply circuitry PS1, PS2 of fig. 1.

  1. Leistungsverstärker, umfassend eine Stromversorgungsschaltung (PS1, PS2), eine Eingangsstufe (A1) und eine Ausgangsstufe (A3, PA1, PA2) zum Liefern von Leistung an eine Last (LOAD), die mit dem Ausgang der Ausgangsstufe über einen proximalen Lastanschluß (7) verbunden ist, und die zusätzlich einen distalen Lastanschluß (6) aufweist,

    dadurch gekennzeichnet, daß
    • die Eingangsstufe von einem Transkonduktanz-Verstärker (A1) zum Umwandeln einer Eingangssignalspannung (Ui) in ein Stromsignal (Iin) an den Signaleingang (3) der Ausgangsstufe abgeschlossen ist;
    • ein Bypass-Widerstand (R) zwischen den Signaleingang (3) der Ausgangsstufe (A3, PA1, PA2) und den distalen Lastanschluß (6) geschaltet ist;
    • der proximale Lastanschluß (7) mit der Signalmasse verbunden ist;
    • die Ausgangsstufe von einem Stromverstärker (A3, PA1, PA2) gebildet ist, zum Liefern eines Leistungsstromsignals an die Last (LOAD), wobei der Bypass-Widerstand (R) das Stromsignal (Iin) in ein Spannungssignal (V) umwandelt, welches im wesentlichen das Leistungsspannungssignal für die Last bildet, wobei die Ausgangsstufe und der Bypass-Widerstand somit eine kombinierte Stromverstärkungs- und Spannungsverstärkungsstufe bildet, und daß
    • die Stromversorgungsschaltung (PS1, PS2) für die Ausgangsstufe als eine schwebende Versorgung und zwischen dem distalen Lastanschluß (6) und der Ausgangsstufe (A3, PA1, PA2) so angeordnet ist, daß das Leistungsstromsignal durch die Stromversorgungsschaltung (PS1, PS2) läuft.
  2. Leistungsverstärker nach Anspruch 1,

    dadurch gekennzeichnet, daß

    daß ein zweiter Transkonduktanz-Verstärker (A2) angeordnet ist, um die Signalspannungsdifferenz (Δu) zwischen dem Ausgang (7) der Ausgangsstufe und dem Eingang (3) davon zu erfassen und ein Korrekturstromsignal (Ikorr), welches proportional zu der Signalspannungsdifferenz ist, zu liefern, um zu dem Stromsignal (Iin) addiert zu werden, um eine Korrektur des Leistungsspannungssignals (V) über dem Bypass-Widerstand (R) für eine Abweichung von dem Lastspannungssignal aufgrund einer Spannungsdifferenz zwischen dem Eingang (3) und dem Ausgang (7) der Ausgangsstufe zu bewirken, wobei die Übertragungsfunktion des zweiten Transkonduktanzverstärkers g ≡ Ikorr/Δu einen derartigen Wert aufweist, daß g*R=1 ist, wobei R der Widerstand des Bypass-Widerstands ist.
  3. Leistungsverstärker nach Anspruch 2,

    dadurch gekennzeichnet, daß

    die Ausgangsstufe umfaßt:
    • einen Stromverstärker (A3) mit einer Einheitsspannungsverstärkung, einer hohen Eingangsimpedanz und einer niedrigen Ausgangsimpedanz, und danach
    • zwei parallele Leistungswandler (PA1, PA2), die das gleiche Signal von dem Stromverstärker (A3) empfangen und in einer Gegentaktkonfiguration verschaltet sind, wobei ein verschalteter Ausgang den Ausgang (7) der Ausgangsstufe bildet.
  4. Leistungsverstärker nach Anspruch 3,

    dadurch gekennzeichnet, daß

    der Leistungswandler (PA1, PA2) eine Versorgung von Leistung von jeweiligen und identischen Spannungsversorgungen (PS1, PS2) aufweist, wobei beide Spannungsversorgungen den distalen Lastanschluß (6) als einen Nullpunkt aufweisen.
  5. Leistungsverstärker nach Anspruch 3,

    dadurch gekennzeichnet, daß
    • eine Ausgangs-Slavestufe (A4, PA3, PA4) mit seinem Ausgang mit dem distalen Lastanschluß (6) verbunden ist, wobei die Slavestufe zwei Leistungswandler (PA3, PA4) und einen ersten Verstärker (A4) umfaßt, wobei ein erster Verstärker (a4) ein Spannungsverstärker ist, der als sein Eingangssignal die Differenz zwischen einem Mittenpotential einer Stromversorgungseinheit (PA3) für die Leistungswandler der Ausgangsstufe und der Slavestufe (PA1-PA4) und dem Potential des Übergangspunkts zwischen zwei Widerständen (R1, R2), die ein wählbares Spannungsteilerverhältnis für die Spannung über der Last (LOAD) bereitstellen, verwendet, und daß
    • die Stromversorgungseinheit (PS3) für die Leistungswandler (PA1-PA4) parallel zu der Reihenschaltung der zwei Leistungswandler (PA1, PA2) in der Ausgangsstufe und zusätzlich parallel zu der Reihenschaltung der zwei Leistungswandler (PA3, PA4) in der Slavestufe geschaltet ist, wobei zwei identische und in Reihe geschaltete Widerstände (R3, R4), die parallel zu der Stromversorgungseinheit (PS3) eingefügt sind, das Mittenpotential für die Stromversorgungseinheit (PS3) bereitstellen, wobei die Anordnung der Stromversorgungseinheit (PS3), der vier Widerstände (R1-R4), des ersten Verstärkers (A4) und der Slave-Leistungswandler (PA3, PA4) die Stromversorgungsschaltung (PS3, A4, R1-R4, PA3, PA4) bilden.
  1. Power amplifier comprising current supply circuitry (PS1, PS2), an input stage (A1) and an output stage (A3, PA1, PA2) for delivering power to a load (LOAD) connected to the output of said output stage by a proximal load terminal (7), and additionally has a distal load terminal (6),

    characterized in that
    • said input stage is terminated by a transconductance amplifier (A1) for converting an input signal voltage (Ui) to a current signal (Iin) to the signal input (3) of said output stage,
    • a bypass resistor (R) is connected between the signal input (3) of said output stage (A3, PA1, PA2) and said distal load terminal (6),
    • said proximal load terminal (7) is signal grounded,
    • said output stage is constituted by a current amplifier (A3, PA1, PA2) for delivering a power current signal to said load (LOAD), said bypass resistor (R) converting the current signal (Iin) to a voltage signal (V) which substantially constitutes the power voltage signal for the load, said output stage and said bypass resistor thus constituting a combined current amplification and voltage amplification stage, and that
    • said current supply circuitry (PS1, PS2) for the output stage is arranged as a floating supply and between the distal load terminal (6) and the output stage (A3, PA1, PA2) so that the power current signal passes through said current supply circuitry (PS1, PS2).
  2. The power amplifier of claim 1,

    characterized in that a second transconductance amplifier (A2) is arranged to sense the signal voltage difference (Δu) between the output (7) of said output stage and the input (3) thereof, and to deliver a correction current signal (Ikorr) that is proportional to said signal voltage difference, to be added to said current signal (Iin) to bring about correction of the power voltage signal (V) across said bypass resistor (R) for a deviation from the load voltage signal due to a voltage difference between the input (3) and the output (7) of said output stage, said second transconductance amplifier transfer function g ≡ Ikorr/Δu having such a value that g * R = 1, R being the resistance of said bypass resistor.
  3. The power amplifier of claim 2,

    characterized in that said output stage comprises
    • a current amplifier (A3) having unity voltage gain, high input impedance and low output impedance, and thereafter
    • two parallel power converters (PA1, PA2) receiving the same signal from said current amplifier (A3) and being connected in a push/pull configuration, with interconnected output constituting the output (7) of said output stage.
  4. The power amplifier of claim 3,

    characterized in that each power converter (PA1, PA2) has supply of power from respective and identical voltage supplies (PS1, PS2), both voltage supplies having the distal load terminal (6) as a zero point.
  5. The power amplifier of claim 3,

    characterized in that
    • an output slave stage (A4, PA3, PA4) is connected with its output to the distal load terminal (6), said slave stage including two power converters (PA3, PA4) and a first amplifier (A4), wherein a first amplifier (A4) is a voltage amplifier which uses as its input signal the difference between a mid-potential for a current supply unit (PS3) for the power converters of said output stage and said slave stage (PA1-PA4), and the potential of the junction point between two resistors (R1, R2) which provide a selectable voltage divider ratio for the voltage across said load (LOAD), and that
    • the current supply unit (PS3) for the power converters (PA1-PA4) is connected parallel to the series connection of the two power converters (PA1, PA2) in the output stage, and additionally parallel to the series connection of the two power converters (PA3, PA4) in the slave stage, two identical and series connected resistors (R3, R4) inserted parallel to said current supply unit (PS3) providing said mid-potential for the current supply unit (PS3), the assembly of said current supply unit (PS3), said four resistors (R1-R4), said first amplifier (A4) and said slave power converters (PA3, PA4) constituting said current supply circuitry (PS3, A4, R1-R4, PA3, PA4).
  1. Amplificateur de puissance comprenant un circuit d'alimentation en courant (PS1, PS2), un étage d'entrée (A1) et un étage de sortie (A3, PA1, PA2) pour délivrer de la puissance à une charge (CHARGE) reliée à la sortie dudit étage de sortie via une borne proximale (7) de charge, et comportant de plus une borne distale (6) de charge,

    caractérisé en ce que
    • ledit étage d'entrée se termine par un amplificateur à transconductance (A1) pour convertir un signal de tension d'entrée (Ui) en un signal de courant (Iin) à l'entrée (3) de signal dudit étage de sortie,
    • une résistance (R) en dérivation est connectée entre l'entrée (3) de signal dudit étage de sortie (A3, PA1, PA2) et ladite borne distale (6) de charge,
    • ladite borne proximale (7) de charge est mise à la masse,
    • ledit étage de sortie est constitué d'un amplificateur de courant (A3, PA1, PA2) pour délivrer un signal de courant de puissance à ladite charge (CHARGE), ladite résistance (R) en dérivation convertissant le signal de courant (Iin) en un signal de tension (V) qui constitue substantiellement le signal de tension de puissance pour la charge, ledit étage de sortie et ladite résistance en dérivation constituant ainsi un étage combiné d'amplification de courant et d'amplification de tension, et en ce que
    • ledit circuit d'alimentation en courant (PS1, PS2) pour l'étage de sortie est agencé en alimentation flottante et entre la borne distale (6) de charge et l'étage de sortie (A3, PA1, PA2) de sorte que le signal de courant de puissance passe dans ledit circuit d'alimentation en courant (PS1, PS2).
  2. Amplificateur de puissance selon la revendication 1, caractérisé en ce qu'un deuxième amplificateur à transconductance (A2) est prévu pour détecter la différence de tension (Δu) entre la sortie (7) dudit étage de sortie et l'entrée (3) de ce dernier, et pour délivrer un signal de courant de correction (Ikorr) qui est proportionnel à ladite différence de tension, qui doit être ajouté audit signal de courant (Iin) pour apporter une correction du signal de tension de puissance (V) aux bornes de ladite résistance (R) en dérivation pour une déviation du signal de tension de charge due à une différence de tension entre l'entrée (3) et la sortie (7) dudit étage de sortie, la fonction de transfert g ≡ Ikorr /Δu dudit deuxième amplificateur à transconductance ayant une valeur telle que g * R = 1, R étant la valeur ohmique de ladite résistance en dérivation.
  3. Amplificateur de puissance selon la revendication 2, caractérisé en ce que ledit étage de sortie comprend :
    • un amplificateur de courant (A3) ayant un gain unité en tension, une impédance d'entrée élevée et une impédance de sortie faible, et ensuite
    • deux convertisseurs de puissance parallèles (PA1, PA2) recevant le même signal dudit amplificateur de courant (A3) et connectés en montage symétrique, leurs sorties interconnectées constituant la sortie (7) dudit étage de sortie.
  4. Amplificateur de puissance selon la revendication 3, caractérisé en ce que les convertisseurs de puissance (PA1, PA2) sont chacun alimentés en courant par une source de tension respective (PS1, PS2), les deux sources de tension (PS1, PS2) étant identiques et ayant leurs bornes distales (6) de charge définies comme point zéro.
  5. Amplificateur de puissance selon la revendication 3, caractérisé en ce que
    • un étage secondaire de sortie (A4, PA3, PA4) est relié par sa sortie à la borne distale (6) de charge, ledit étage secondaire comportant deux convertisseurs de puissance (PA3, PA4) et un premier amplificateur (A4), dans lequel un premier amplificateur (A4) est un amplificateur de tension qui utilise comme signal d'entrée la différence entre un demi-potentiel pour une unité d'alimentation en courant (PS3) pour les convertisseurs de puissance dudit étage de sortie et dudit étage secondaire (PA1-PA4), et le potentiel au point de jonction entre deux résistances (R1, R2) qui fournissent un rapport de diviseur de tension réglable pour la tension aux bornes de ladite charge (CHARGE), et en ce que
    • l'unité d'alimentation en courant (PS3) pour les convertisseurs de puissance (PA1-PA4) est branchée en parallèle à la connexion en série des deux convertisseurs de puissance (PA1, PA2) dans l'étage de sortie, et aussi en parallèle à la connexion en série des deux convertisseurs de puissance (PA3, PA4) dans l'étage secondaire, deux résistances identiques (R3, R4) montées en série et insérées en parallèle à ladite unité d'alimentation en courant (PS3) fournissant ledit demi-potentiel à ladite unité d'alimentation en courant (PS3), l'ensemble formé par ladite unité d'alimentation en courant (PS3), lesdites quatre résistances (R1-R4), ledit premier amplificateur (A4) et lesdits convertisseurs de puissance secondaires (PA3, PA4) constituant ledit circuit d'alimentation en courant (PS3, A4, R1-R4, PA3, PA4).

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