FIELD OF THE INVENTION
This invention generally relates to electronic systems and in particular
it relates to a class AB input stage.
BACKGROUND OF THE INVENTION
As the communications technology progresses into higher frequency
bands, the requirements for speed in the analog front and back end increase. Operational
Amplifier requirements for these applications are not only for a high small signals
bandwidth, but also for a high large signals (dynamic) bandwidth. These new Operational
Amplifiers need to be even faster than their predecessors in order to ensure low
harmonic distortion at high speed.
Large signals bandwidth (BW), or full power bandwidth, is defined
as: BW = Slew Rate/2*Vp, where Vp is peak voltage. In other words, the faster the
slew rate of the Op Amp, the larger the large signals bandwidth. This also brings
better distortion for large signals at high frequencies, mainly due to the fact
that the Op Amp will be able to follow faster input signals before it becomes slew
rate limited. It is also important to remember that the Op Amp must be power efficient,
thus, preferably, only boosting its slewing current during the slewing transitions.
The typical prior art solution to these previously mentioned needs
is the Class AB input stage. This topology has the advantage of consuming very
low standing current (in absence of input signal or for a small signals input)
but capable of boosting its slewing current in the presence of a "large signals"
The limitation of the conventional Class AB bipolar input stage is
a base current limitation that translates into the well known non-linearities that
typically are associated with this type of input stage. In other words, there is
trade off, when setting this input stage, between available base current to drive
the slewing transistor and standing current through those slewing transistors.
The boosted slewing current is proportional to the input signal seen by the input
stage. Typically the best setting has a low quiescent current and becomes base
current limited half way through the slewing transition of the largest possible
signal swing. Even with this set up the standing current ends up being substantial
which is very inefficient, especially in the case of input signals smaller than
the full dynamic input range of the Op Amp. The lack of base current to the slewing
transistors translates to distortion, due to the time that the slewing transistor
takes to turn "on" and return back to its quiescent biasing point after suddenly
An example of a prior art class AB input stage is shown in Figure
1. The circuit of Figure 1 includes transistors 20-31; current sources 34-37; resistors
40-44; capacitor CC; input nodes IN+ and IN-; source voltages VCC
and VEE; and output node 46. Resistors 41-44 have the same value. The
slew rate (SR) for the prior art circuit of Figure 1 is given by the following
SR = |Vin+ - Vin-| / (R2•CC)
Vin+ is the voltage at node IN+. Vin- is the voltage at node IN-.
R2 is the resistance of resistor 40. Notice that R2 sets
the transconductance (gm) of the input stage, which sets the small signals bandwidth,
the open loop gain, noise, and large signals bandwidth. R2 is typically
set to be around 500 ohms. For a ±10V signal the slewing current is as much as
20V/500ohm = 40mA. For a one volt step this current would be 1/500=2mA.
To prevent the non-linearities associated with transistors saturating
or turning off during slewing, transistors 20-27 cannot be allowed to ever turn
off or even get extremely debiased during slewing. For a 20V step and 40mA slewing
current and beta of 80, the current I must be at least 500mA, preferably twice
that. A 1mA standing current is wasted if the application never requires the opamp
to amplify a signal larger than 1 Vpp, where Vpp is peak-to-peak
SUMMARY OF THE INVENTION
An improved Class AB input stage monitors the needs of base current
in the slewing transistors and supplies that base current in an extremely fast
and precise feedback loop. This allows the input stage quiescent current to be
very small and gets rid of the non-linearities associated with the lack of base
current available to drive the slewing transistors in a conventional prior art
Class AB input stage. A very efficient, low distortion, high small signals and
full power bandwidth Class AB input stage is provided.
BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention, reference
is now made to the following detailed description of certain particular and illustrative
embodiments and the features and aspects thereof, by way of example only, and
with reference to the figures of the accompanying drawings in which:
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
- FIG. 1 is a schematic circuit diagram of a prior art class AB input stage;
- FIG. 2 is a schematic circuit diagram of a preferred embodiment Class AB dynamically
biased input stage.
The input stage described below is an improved Class AB input stage
where the needs of base current in the slewing transistors are monitored and supplied
in an extremely fast and precise feedback loop. This allows the input stage quiescent
current to be very small and gets rid of the non-linearities associated with the
lack of base current available to drive the slewing transistors seen in the conventional
prior art Class AB input stage. In other words a very efficient, low distortion,
high small signals and full power bandwidth Class AB input stage.
A preferred embodiment Class AB dynamically biased input stage is
shown in Figure 2. The circuit of Figure 2 includes all the components of the prior
art circuit of Figure 1 without current sources 34-37, and additional circuitry
that includes NPN transistors 50-55; PNP transistors 57-62; current sources 64-71;
resistors 74-81. Current source 34 of the prior art circuit of Figure 1 has been
replaced by feedback circuit 90 which monitors and supplies the base current to
transistor 23 in an extremely fast and precise feedback loop. Current sources 35-37
have been replaced in the same way by feedback circuits 91-93, respectively. Resistors
74-81 have the same value.
The additional feedback circuit 91 works as follows. The current
I in current source 65 sets the base-emitter voltage (Vbe) of transistor 52 and
the voltage drop across the emitter resistor 75 of transistor 52. This voltage
gets imposed onto the base of transistor 51 and its emitter current setting resistor
74. Also, the collector current of transistor 51 gets amplified by the hfe of transistor
59 and serves as a current source to the base of transistor 22 and the biasing
transistor 21. Quiescently (in the presence of no resistive load) the base current
of transistor 22 is very small, such that most of the current in transistor 59
becomes the collector current of transistor 21. Feedback circuits 90, 92 and 93
work the same way as circuit 91. Thus the current through transistors 20, 21, 26,
and 27 set the quiescent operating point of the input stage, which is controlled
by the voltage developed at the bases of transistors 52, 55, 57, and 61. These
base voltages are set by current sources 65, 66, 69, and 70. During sourcing conditions,
the collector currents of transistors 59 and 62 provide base current to transistors
22 and 24, respectively. During sinking conditions, the collector currents of
transistors 50 and 53 provide base current to transistors 23 and 25, respectively.
Notice that current sources (transistors) 50, 53, 59, and 62 get dynamically modulated
by the input signals IN+ and IN- at the bases of transistors 20, 27, 21, and 26,
While this invention has been described with reference to an illustrative
embodiment, this description is not intended to be construed in a limiting sense.
Various modifications and combinations of the illustrative embodiment, as well
as other embodiments of the invention, will be apparent to persons skilled in the
art upon reference to the description.