Applicant's invention relates generally to the conversion and measurement
of the current of an electrical load, and more particularly to an apparatus that
will produce a signal proportional to the rms current of the load.
Many methods have been utilized to measure the AC current flowing
to a load. These methods are used as part of more complex devices such as solid
state breakers or overload relays, AC line monitoring devices, or current feedback
control loops as required for motor drives and power supplies. The application
usually determines the degree of measurement accuracy required. Root-mean-square
(rms) current is generally considered to be an accurate representation of the
actual current flowing in the circuit being monitored. For simple systems, this
may not be necessary and instead, average current over a set time period, usually
one cycle, is used to represent the actual current. Other systems will use peak
current over the same time period as the basis. More sophisticated microprocessor
based devices will actually compute the rms value by sampling the current waveforms
many times during each time period, and using those sample measurements to generate
the value of the current over the time period.
Using a solid state overload relay as an example of one such application,
a common method used to generate a signal representative of the line current is
to use a peak detecting circuit as disclosed in commonly assigned U.S. Patent 4,345,288.
Although this device provides a close approximation of a standard thermal electromechanical
overload unit, the device does not compensate for non-sinusoidal currents that
may be encountered in some instances. Likewise, line harmonics and transients may
cause erroneous results. An alternative method, as disclosed in French Patent FR2540303
(= US4513342), monitors the squared-time (I2t) value of load current
to provide an overload indication, should a predetermined value be exceeded. This
Frends Patent discloses an apparatus having the features of the preamble of claim
1. An alterative method using a microprocessor based device is outlined in U.S.
Patent 5,220,478 which will compute the rms current through digital sampling techniques.
Whereas this is a more accurate method, it is a relatively expensive solution
because of the increased component requirements for support circuitry and the
increase in the size of the device to house the extra components. For a low cost
application where size is also a factor, it would be desirable to provide a solid
state overload relay that computes an approximation of the rms current without
the complexity of a microprocessor based device.
Summary of Invention
It is an object of the invention to provide improved apparatus for
The invention provides an apparatus as defined in the appended claims.
In the preferred embodiment of the invention, conventional current
transformers sense the current flow in each phase of load. The load typically could
be a single or three phase motor. The current transformers generate an output
current. This output is proportional in magnitude to the sensed current. This voltage
signal is applied to two circuits connected in parallel, one to measure the peak
value of the voltage over one cycle of the applied AC voltage. The outputs of both
of these circuits are connected together at a summing junction through different
valued resistors of a buffer amplifier. These different resistance values at the
input to the summing point serve as to provide different weighting factors to the
two signals to produce a composite voltage signal. This signal will be a DC level,
which for a sinusoidal current, closely approximates a scaled rms value of the
original input load current. For the common non-sinusoidal current waveforms encountered
in most applications, this circuit will retain its accuracy to within a+/-5% of
the true rms value.
For a current monitoring function, this output can be easily converted
and scaled to a digital representation of the load current and visually displayed.
To provide an overload or circuit breaker function, this output is fed to a time
integrating circuit to produce various trip curves, the output of which is compared
with a predetermined trip reference voltage signal. When this output exceeds this
level, the overload or breaker will trip, providing an output contact or contacts
that will change state when this does occur.
Various power conversation devices such as PWM inverters require
a current feedback signal representative of the load current as a controlling
element of the device for current limit control. The output voltage of the present
invention can provide this function by utilzing this output, with proper scaling
factors, as an input to the inverter as the current feedback signal which is proportional
to the rms current of the load.
Other features and advantages of the invention, which are believed
to be novel and non-obvious, will be apparent from the following specification
taken in conjunction with the accompanying drawings in which there is shown a
preferred embodiment of the invention. Reference is made to the claims for interpreting
the full scope of the invention which is not necessarily represented by such embodiment.
Brief Description of Drawings
- FIG. 1 is a diagram of a typical prior art solid state overload relay (SSOLR)
- FIG. 2 is a schematic block diagram of a SSOLR utilizing a system for converting
the load current to an approximation of the rms value of the current according
to an embodiment of the present invention.
- FIG. 3 is a detailed schematic block diagram of the approximation circuit as
depicted in Fig. 2.
Although this invention is susceptible to embodiments of many different
forms, a preferred embodiment will be described and illustrated in detail herein.
The present disclosure exemplifies the principles of the invention and is not to
be considered a limit to the broader aspects of the invention to the particular
embodiment as described.
FIG. 1 illustrates a typical solid state overload relay protective
device representative of prior art. A circuit breaker function would be similar.
Three phase incoming power L1-L3 is fed to a load 2. The load could be lighting
equipment, heating equipment or inductive loads such as motors, magnets, brakes
or coils. Current sensors 4 monitor the load currents L1-L3 to create currents
i1-i3 respectively which are proportional in magnitude to the sensed currents.
The current sensors 4 generally are current transformers. A current voltage converter
6 transforms the three currents i1-i3 to an output voltage that is proportional
to a composite of the sum of the three currents. The resulting voltage Vo is mostly
DC with about a 10% ripple for balanced sinusoidal currents. A peak detecting
circuit 8. Typically consisting of a diode and a capacitor, will capture the peaks
of the ripple voltage Vo to generate a voltage V1 which will be a DC voltage that
is proportional to the peak current of the load 2. The overload relay function
is time based and not instantaneous. The greater the magnitude of the overload,
the faster the overload relay must trip out. Therefore, time integrator amplifier
10 will integrate voltage V1 to create V2 which has an inverse time relationship
with the magnitude of the sensed currents l1-l3. Voltage V2 is an exponential
response to the input voltage V1. When an overload condition arises, V2 will start
ramping up above a level that represents the 100% current rating of the overload
relay. To create the overload trip curve a voltage 12, as set by trip level setting
circuit 14 is computed such that the output of the time integrator amplifier 10
will reach this voltage level 12 if the overload condition exists for a predetermined
amount of time. For instance, if the overload condition is at 600% of the rated
load, this time might be set at 10 seconds and be set at 200 seconds if the overload
is at 200% of the load. Trip level comparator 16 will compare voltage V2 with
this predetermined voltage 4 and will output a signal 18 that will energize control
relay 22 through output amplifier 20 once voltage V2 exceeds set level voltage
4. Comparator 16 will function as a schmidt trigger in that once this comparison
has been exceeded, the output 18 will remain in the tripped state until output
V2 has decayed below a second predetermined reset level 24 and the reset 26 is
activated, either manually or automatically. Contacts 28 from relay 22 are used
to disconnect the power L1-L3 from the load, the details of which are well known,
when the overload relay has tripped.
Referring to Fig.2, an improved solid state overload relay 30 is
detailed utilizing a system for converting the load currents L1-L3 to an approximation
of the rms value of the current according to the present invention. Although a
three phase system is disclosed, it is to be understood that a single phase or
polyphase system would function in a similar manner. As discussed above, three
phase incoming power L1-L3 is fed to a load 2. Current sensors 4 monitor the load
current l1-l3 to create the proportional currents i1-i3, respectively. Each of
the currents i1-i3 is independently proceed by an rms current approximation circuit
32-34, the object of the present invention. Current i1 is converted to a voltage
V3 by an I-V converter 36. V3, which is proportional to the load current l1, is
divided into two paths, one to a peak level detecting circuit 38 and the other
to an average level measuring circuit 40. Peak level detecting circuit 38 will
capture the peaks of the ripple voltage V3, generating a voltage level V4. Average
level measuring circuit 40 generates a voltage V5 which will be a DC voltage that
is proportional to the average current of the load 2. V4 and V5 are inputted to
scaling and summing amplifier 42 which generates a voltage V6 which is a proportional
rms approximation of the sensed line current l1.
It has been empirically determined that an accurate approximation
of the line current can be attained based on the equation:
Irms = 0.22*pk + 0.766* Iave
where: Irms is the root mean square current,
Ipk is the peak value of current, and
Iave is the average value of current.
Scaling and summing amplifier 42 solves this equation to create the DC output voltage
V6 which is proportional to rms value of the line currents L1-L3. For most non-sinusoidal
current, a +/- 5% accuracy for the approximation can be attained. This compares
with a 30% accuracy common for traditional systems based on a peak detecting method.
Likewise, rms current approximation circuits 33 and 34, which are
identical with circuit 32, will generate output voltages V7 and V8. The output
voltages V6-V8 are fed to an averaging circuit 43 which will combine them to create
a composite DC voltage V9 which is proportional to the average of the three rms
phase currents l1,l2 and l3. V9 is inputted to time integrator circuit 44 which,
along with the trip level comparator 46, and output buffer amplifier 48 provides
the timing function and output relay contacts as previously discussed for the
overload relay function and is identical with the system disclosed above. For a
single phase system, only rms current approximation circuit 32 is required and
output voltage V6 is fed directly to the time integrator circuit 44.
For the preferred embodiment of the present invention, Fig. 3 details
the approximation circuit 32 as depicted in Fig. 2 which comprises the current
to voltage converter 36, the peak level detecting circuit 38. The average level
measuring circuit 40, and the scaling and summing amplifier 42. As previously
mentioned, approximation circuits 33-34 are identical to circuit 32. Load current
L1-L3 are monitored by current transformers in each of the three phase conductors.
The secondaries of the current transformers produce current i1-i2 and i3. Currents
i1-i3 are reduced in magnitude based on the turns ratio of the current transformers.
Each phase current is measured separately by the current to voltage converter
circuit 36 in each of the approximation circuits 32-34. Bridge rectifier BR1 produces
a full wave recitifed current from i1 to generate a full wave rectified voltage
V3 across burden resistor R1. Voltage V3 is divided into two paths, one to peak
level detecting circuit 38 through resistor R2 and the other to average level
measuring circuit 40 through resistor R3.
The peak detecting circuit 38 consists of a first op amp IC1A, which
together with diode D1 combine to form an ideal diode combination and capacitor
C2. The ideal diode combination eliminates a voltage drop normally associated with
a standard diode which would result in errors in the output voltage V4. Resistor
R4 connected in parallel with C2 provides a discharge path with a long time constant
to avoid the circuit from becoming just a sample and hold circuit. C2 has low
resistance in its charging path and high resistance in its discharge path so that
the voltage across C2 will essentially be proportionally equal to the peak value
of the input voltage V3. Op amp IC1B provides a buffer for output V4 to avoid the
input impedance of the next stage from causing an error in the C2 voltage. The
output V4 of buffer amp IB1B thus represents this peak voltage.
A series connected resistor R3 and capacitor C1 combine to form the
average level measuring circuit 40. The voltage across C1 will be proportional
to the average of the voltage V3. R3 and C1 are scaled to provide this function
over the frequency range from 48 Hz to at least 780 Hz. Op amp IC1C provides a
buffer for output V5 to avoid the input impedance of the next stage from causing
an error in the C1 voltage. The output V5 of buffer amp IC1C thus represents the
average of the V3 voltage.
Scaling and summing amplifier circuit 42 receives voltages V4 and
V5 at a summing junction of op amp IC1D through resistors R6 and R5 respectively.
The values of these resistors along with feedback resistor R7 are calculated such
that the output V6 of the summer amplifier IC1D will be proportional to fractions
of the each input V4, V5, so as to solve the equation Irms = 0.22*Ipk = 0.766*Iave.
Output voltage V6 is a DC voltage which has been empirically determined to be proportional
to the rms value of the line currents L1-L3 for sinusoidal currents and having,
for most non-sinusoidal currents, an accuracy that is within 5% of the true rms
value. For a single phase system, voltage V6 can be directly coupled to time integrated
amplifier 44 as disclosed in Fig. 2 to create the improved solid state overload
relay previously discussed. For a three phase system, voltage V6 is coupled to
the averaging circuit 33 where it is combined with the equivalent voltages V7
and V8 generated by the other two phases to generate the output voltage V9 which
is proportional to the average of the three rms phase currents l1-l3. The op amp
circuits IC1A-D are supplied from a dual rail +/- 12VDC power supply, not shown,
but the details of which are well known.
While the specific embodiments have been illustrated and described,
numerous modifications are possible without departing from the scope of the invention.
Although in the foregoing embodiments have been applied to single and three phase
systems, it will be clearly understood that the invention is equally applicable
to polyphase systems, with the requirement being the addition or subtraction of
a separate rms approximation circuit for each phase of the voltage source, adjustments
in the time constants of the resistor-capitor combinations in the peak level detecting
and average level detecting circuit, and changes in the averaging circuit that
combines the outputs of the rms approximation circuits.