PatentDe  


Dokumentenidentifikation EP0849876 08.01.2004
EP-Veröffentlichungsnummer 0000849876
Titel Verstärkerschaltung mit grossem dynamischen Bereich und geringem Energieverbrauch
Anmelder Fujitsu Ltd., Kawasaki, Kanagawa, JP
Erfinder Yuasa, Tachio, Nakahara-ku, Kanagawa 211, JP
Vertreter derzeit kein Vertreter bestellt
DE-Aktenzeichen 69726390
Vertragsstaaten DE, FR
Sprache des Dokument EN
EP-Anmeldetag 02.07.1997
EP-Aktenzeichen 971108758
EP-Offenlegungsdatum 24.06.1998
EP date of grant 26.11.2003
Veröffentlichungstag im Patentblatt 08.01.2004
IPC-Hauptklasse H03F 3/30

Beschreibung[en]
BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to an amplifier circuit for amplifying internal signals or input/output signals of electronic equipment and devices or, in particular, to an amplifier circuit constituting an output stage of an operational amplifier used for signal processing in an analog electronic circuit.

2. Description of the Related Art

In conventional class-A operational amplifier circuits, the no-load output potential is set to a point intermediate between a supplied voltage using a current of a constant current source and a current supplied from a current-conversion transistor for converting the current of the output voltage of a differential amplifier circuit. The current of the current-conversion transistor and the current of the constant current source determine the driving capability of the output of the particular amplifier circuit. The larger the magnitude of these currents, therefore, the more the impedance can be reduced that can drive the signal amplitude as a load. Under no load or under a voltage load requiring no output current, however, the currents of a current-conversion transistor flow directly from the high potential side to the ground, thereby increasing the current consumed by the circuit. These currents must be reduced in order to reduce the power consumption of the amplifier circuit. The problem, however, is that a reduced current leads to a reduced drive capability.

Further, an attempt to increase the dynamic range (amplitude range) of the output current is accompanied by the requirement of considerably changing the output voltage of the differential amplifier circuit supplying a gate voltage to the current conversion transistor. For the output voltage amplitude of the differential amplifier circuit to be increased, on the other hand, the offset voltage between two input signal terminals increases unavoidably. As a result, an offset also occurs in the signal applied through the circuit, thereby posing the problem of crossover distortion.

The publication "Low Voltage Performance of a Low Noise Operational Amplifier in a 1.2 µDigital CMOS Technology", by HOLMANN W. T. et al in PROCEEDINGS OF THE 37th MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, Vol. 1, 3-5 August 1994, pages 111-114 discloses an amplifier circuit in which a first current amplifier circuit and a second current amplifier circuit are serially connected..

SUMMARY OF THE INVENTION

Accordingly, the object of the present invention is to provide an amplifier circuit having a wide amplitude range of the output signal with a low current consumption, as defined in claim 1.

In the amplifier circuit according to the invention, the difference current is amplified. Even when the currents flowing in the signal conversion circuit and the difference current generation circuit are small, therefore, the dynamic range of the output can be widened. Further, in the case where the amplifier circuit is designed in such a manner that the output current is not supplied under no load, a small steady current flows only in the signal conversion circuit and the difference current generation circuit under such a condition, thereby making it possible to reduce the whole current consumption.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be more clearly understood from the description as set forth below with reference to the accompanying drawings, wherein:

  • Fig. 1 is a circuit diagram showing a configuration of a conventional amplifier circuit;
  • Figs. 2A to 2C are diagrams for explaining the operation of a conventional amplifier circuit;
  • Fig. 3 is a diagram for explaining the basic configuration of the present invention;
  • Fig. 4 is a circuit diagram showing an exemple of an amplifier circuit;
  • Figs. 5A and 5B are diagrams for explaining the operation of the amplifier circuit shown in fig. 4;
  • Fig. 6 is a diagram showing a modification of the amplifier circuit of fig. 4;
  • Fig. 7 is a circuit diagram showing an amplifier circuit according to a first embodiment of the invention;
  • Figs. 8A and 8B are diagrams for explaining the operation of the amplifier circuit according to the first embodiment;
  • Figs. 9A and 9B are circuit diagrams showing modifications of the amplifier circuit according to the first embodiment; and
  • Fig. 10 is a circuit diagram showing an amplifier circuit according to a second embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Before proceeding to a detailed description of the preferred embodiments of the present invention, a prior art amplifier circuit will be described with reference to the accompanying drawings relating thereto for a clearer understanding of the differences between the prior art and the present invention.

Fig. 1 is a diagram showing a circuit configuration of a conventional amplifier circuit relating to the present invention. This circuit represents a typical example of a class-A operational amplifier circuit. Characters IP designates a non-inverted input terminal, character IM an inverted input terminal, characters VB an operation bias input terminal, and character O an output terminal. Transistors M1 to M5 constitute a differential amplifier circuit having a single-ended output Vx. A transistor M6 converts the output voltage Vx of the differential amplifier circuit Vx into a drain current. A transistor M7 acts as a constant current source and functions in such a manner that the potential of the output O under no load is set to about the intermediate level between the supplied voltage by the constant current supplied from the transistor M7 and the current flowing in the transistor M6.

A capacitor C1 is a phase-compensating capacitive element. The present invention has no relation to the operation of the phase-compensating capacitive element, and therefore the capacitor C1 will be nether explained nor illustrated in the description that follows.

Figs. 2A to 2C are diagrams for explaining the operation of the amplifier circuit shown in Fig. 1. Fig. 2A shows the state producing no output, Fig. 2B the state where a current is flowed from the amplifier circuit, and Fig. 2C the state where a current is absorbed into the amplifier circuit. The transistor M7 acts as a constant current source. The amplifier circuit is required to be designed to have an output potential substantially one half of the supplied voltage in the case where the signal input terminals IP and IM have the same potential. This in turn requires that the currents I6 and I7 flowing in the transistor M6 and M7 are equal to each other. This state is shown in Fig. 2A, in which the current I6 flowing in the transistor M6 is supplied directly to the transistor M7 as a current I7, and therefore no output current appears. In the case where a load is driven by flowing the current from this amplifier circuit, the voltage applied to the input terminal IP is increased or the voltage applied to the input terminal IM is decreased so as to decrease the voltage applied to the control electrode gate of the transistor M6. As a result, as shown in Fig. 2B, I6 increases and a current I equivalent to the difference between I6 and I7 flows into the load. In the case where the amplifier circuit absorbs the current from the load, on the other hand, the voltage applied to IP is decreased or the voltage applied to IM is increased, thereby increasing the voltage applied to the control electrode gate of the transistor M6. Consequently, as shown in Fig. 2C, I6 decreases so that the current I equivalent to the difference between I7 and I6 flows out the load.

In this way, the currents I6 and I7 determine the drive capability of the output of this amplifier circuit. The larger the currents I6 and I7, the more is it possible to decrease the impedance capable of driving the signal amplitude as a load. Under no load or under a voltage load requiring no output current, however, a current equivalent to I6 (I7) flows from high potential side of the power supply directly to the ground. With the increase in I6 and I7, therefore, a larger current is consumed by the circuit. In portable electronic equipment and devices, the use of which has widely spread in recent years, the LSI has been introduced to the circuits to reduce the size and weight and a battery is used for a power supply. The battery life is a crucial factor for the portable electronic equipment and devices with a reduced power consumption are desired. In view of this, it is necessary to reduce the current consumption of each circuit. The reduction in the current consumption of the amplifier circuit makes it necessary to reduce both the currents I6 and I7 described above. In spite of this, the reduction in I6 and I7 poses the problem of a lower drive capability.

Consider, for example, the case in which a current is flowed from the amplifier circuit to drive a load. As far as such a case is concerned, the output current I is given as I6 - I7, indicating that a larger I6 and a smaller I7 are desirable. An excessively large difference between I6 and I7, however, undesirably increases the difference of I6 between when the amplifier circuit is under no load with I6 equal to I7 and when the output is at maximum. In this way, an attempt to increase the dynamic range (amplitude range) of the output current I requires a large change in the output voltage of the differential amplifier circuit Vx supplying the gate voltage of the transistor M6. An attempt to increase the output voltage amplitude of the differential amplifier circuit, on the other hand, unavoidably increases the offset voltage between the two input signal terminals IP and IM. With the increase in the offset voltage of the operational amplifier circuit, the signal passing through the circuit also contains an offset, thereby causing crossover distortion.

The same'is true in the case where a current is absorbed into the amplifier circuit from a load. As shown in Fig. 2C, I6 can be minimized, for example, only to about three tenths of the value thereof under steady state (when I6 = 1). The dynamic range of the output current I thus is limited.

Fig. 3 is a diagram showing an exemple of an amplifier circuit. As shown in Fig. 3, the amplifier circuit comprises a signal conversion circuit 1 for converting the input signal to a first current signal, a difference current generation circuit 2 for generating the difference current between a predetermined current value and the first current signal, and a current amplifier circuit 3 for amplifying the difference current. The signal conversion circuit 1 includes a transistor, and an input signal is applied to the control electrode of the transistor, while the first current signal is output from one of the controlled electrodes of the transistor. The difference current generation circuit 2 comprises a constant current source for generating and producing a difference current between the current value of the constant current source and the first current signal. The current amplifier circuit 3 includes a current mirror circuit. In the amplifier circuit, the difference current is amplified. Even in the case where the current flowing in the signal conversion circuit 1 and the current calculation circuit 2 is small, therefore, the dynamic range of the output can be widened. Further, with an amplifier circuit designed in such a manner that no output current flows under no load, the current flowing steadily under such a condition is the small one flowing in the signal conversion circuit 1 and the current calculation circuit 2, thus making it possible to reduce the current consumption.

Fig. 4 is a diagram showing a further circuit configuration. As shown in Fig. 4, the circuit portion including the transistors M1 to M7 is identical to the corresponding portion in Fig. 1. The connecting point between the transistors M6 and M7 is connected with an amplifier circuit consisting of the transistors M8 and M9. As described above, the transistors M1 to M5 make up a differential amplifier circuit having a single ended output. The transistor M6 is the portion for converting the output voltage of the differential amplifier circuit to a current and corresponds to the signal conversion circuit 1 in Fig. 3. The transistor M7, which operates as a constant current source for supplying a constant current, is the portion functioning to absorb the summation of the constant current and the current of the transistor M6 from the transistor M8 and corresponds to the current calculation circuit 2 in Fig. 3. The portion 5 made up of the transistors M8 and M9, on the other hand, constitutes a current amplifier circuit called the current mirror circuit for determining the ratio of the current 19 flowing out the transistor M9 with respect to the current 18 flowing out the transistor M8 according to the size of the transistor or the like. In the case under consideration, the ratio is I8:I9 = 1:m. The first exemple involves the value m = 10, for example.

Figs. 5A and 5B are diagrams for explaining the operation of the amplifier circuit shown in Fig. 4. As described above, the transistor M7 operates as a constant current source. The relation I7 = I6 + I8 holds between the current I7 flowing in the transistor M7 and the current I8. For facilitating the understanding in the circuits of Figs. 1 and 4, all the transistors M1 to M7 are assumed to be equal to each other with an equal bias voltage VB. This relation leads to I8 = I7 - I6 and I9 = m x I8 = m x (I7 - I6). As in the case of Fig. 1, the conditions are set to assure that I6 = I7 when the potential is equal between IP and IM. In the case where I6 = I7, I8 is zero, so that I9 is also zero as shown in Fig. 5A. No current output, therefore, is produced. In other words, in the absence of output as in the case of (1) in Fig. 5, 16 (I7) is the only current which flows in the circuit and is considered the same as the current flowing in the circuit of Fig. 1.

As shown with reference to Fig. 2C, on the other hand, the reduction in the output current of M6 is limited if the input offset voltage is to be within a predetermined value. Assume that the reduction is -ΔI6. In Fig. 2C, ΔI6 is given as 7/10 x I7. Similarly, the reduction ΔI6 is expressed as 7/10 x I7 in Fig. 5B. In the case where I6 is given as 3/10 x I7 as shown in Fig. 5B, I8 is 7/10 x I7, and I9 is m x ΔI6. The current I flowed from the amplifier circuit can thus be expressed as m x I7 - m x (I6 - ΔI6) = m x ΔI6 (here I7 = I6). In other words, the dynamic range of the output is increased by a factor of m. The absorption amplitude is 0.7 for the circuit of Fig.2C, and the flowed amplitude is 7 for the circuit of Fig. 5B. In both cases, m is ten times as large.

As described above, the dynamic range (amplitude range) of the output current can be increased without increasing the current consumption. With the circuit shown in Fig. 4, the logic for controlling the output current I from the differential amplifier circuit is reversed to that for the circuit of Fig. 1, and so is the relation between the input terminals IP and IM.

In the setting described with reference to Figs. 5A and 5B, only the amount of the current flowed to the load from the amplifier circuit undergoes a change while the current is not flowed from the load into the amplifier circuit. A simple method of solving this inconvenience is to insert a current source between the VSS and output O of the circuit shown in Fig. 4. An exemple having such a configuration is shown in Fig. 6. A transistor M10 functions as such a current source.

Fig. 7 is a diagram showing a configuration of an amplifier circuit according to a first embodiment. The circuit of the first embodiment includes, in addition to the circuit components of the circuit shown in fig. 4, a current mirror circuit 6 configured of transistors M10 and M11 providing N-channel MOSFETs as a complementary configuration to the transistors M8 and M9. This current mirror circuit 6 is equivalent to the current mirror circuit 5 including the transistors M8 and M9 constituting a P-channel MOSFET. This configuration makes up a push-pull setup of the output stage which can operate to supply the output current in the desired one of the directions from and into the amplifier circuit.

In the amplifier circuit according to the first embodiment, I8 and I10 are both zero when I6 = I7. Hence, I9 and I11 are also zero. The current flowing under no load, therefore, is I6 (I7) which is the same as in the case of the conventional circuit shown in Fig. 1. This is an ideal case, and some current flows actually due to variations of characteristics between the transistors. In spite of this, such a current is normally minuscule.

Fig. 8A shows the state of the amplifier circuit according to the first embodiment which operates in such a manner that the output current flows into the amplifier circuit. Fig. 8B shows the state of the amplifier circuit according to the first embodiment which operates in such a manner that the output current flows out of the amplifier circuit. In this circuit, the relation holds that I6 + I8 = I7 + I10. Assume that I8:I9 = I10:I11 = 1:m. The factor m is set 20, for example, in Figs. 8A and 8B. From these equations, the relation is established that the output current I = I9 - I11 = -m(I6 - I7). In this circuit, the transistor M7 acts as a constant current source. With the decrease in 16, therefore, I8 increases while I10 decreases.

Accordingly, I9 increases and I11 decreases, with the result that a more output current I flows out from the amplifier circuit. With the increase in I6, in contrast, I8 decreases and I10 increases. At the same time time, I9 decreases and I11 increases, so that a more current I flows into the amplifier circuit. Assuming that the input offset voltage is not more than a predetermined value in the case where the change in the output current of the transistor M6 is ±ΔI6, therefore, the fluctuation of the output current of the circuit is given as ±m x ΔI6. In the conventional amplifier circuit shown in Fig. 1, the fluctuation is ±ΔI6 indicating that the change of the output current is enlarged by a factor of m. In this way, the amplifier circuit according to the first embodiment permits the amplitude range of the output current to be increased in the two directions of flow-in and flow-out of the amplifier circuit without increasing the current consumption. With the circuit of the first embodiment, the logic of controlling the output current I from the differential amplifier circuit is reversed to that for the circuit of Fig. 1, and so is the relation between the input terminals IP and IM.

In the circuit according to the first embodiment shown in Fig. 7, the current flows from the high-potential side VDD of the power supply through the transistors M8 and M10 to the low-potential side VSS of the power supply, and there is no means available for controlling this current. For this reason, a large current flows in this route for an increased current consumption, sometimes resulting in a breakdown of the transistor or the like due to the heat generated. In order to obviate this problem, it is necessary to provide a current bias regulation circuit for limiting the current in this route. Figs. 9A and 9B are diagrams showing modifications of the amplifier circuit according to the first embodiment including a current bias regulation circuit inserted in the above-mentioned route. Fig. 9A shows an example in which a resistor is inserted as a current bias regulation circuit, and Fig. 9B an example in which transistors MB1 and MB2 supplied with appropriate bias voltages VB1 and VB2 are inserted as a current bias regulation circuit. The current bias regulation circuit is not limited to these examples, but may take any form that can limit the current.

Fig. 10 is a diagram showing an amplifier circuit according to a second embodiment. The differential amplifier circuit and the portion including the transistors M6 to M9 of this amplifier circuit are identical to the corresponding component parts of the first embodiment. The current mirror circuit 6 consisting of the transistors M10 and M11 also have the same function as the corresponding circuit of the first embodiment. This embodiment is different from the first embodiment in that a signal conversion circuit and a difference current generation circuit including transistors M6' and M7' are inserted in addition to the signal conversion circuit and the difference current generation circuit including M6 and M7, respectively, so that the current mirror circuit 5 including the transistors M8 and M9 is supplied with an input current from the signal conversion circuit and the difference current generation circuit including M6 and M7, while the current mirror circuit including the transistors M10 and M11 is supplied with an input current from the signal conversion circuit and the difference current generation circuit including M6' and M7', respectively. This configuration makes it possible for the two current mirror circuits combined to perform a push-pull operation like the current mirror circuit of the first embodiment. Since the bias current value of each current mirror circuit can be determined uniquely, it is not necessary to provide the current bias regulation circuit required in the circuit according to the first embodiment shown in Fig. 7. This is, however, at the expense of a current consumption increased by the amount flowing in the route formed by M6' and M7'. But the current consumption caused by M6' and M7' is still much smaller in the case that the dynamic range is widened by increasing I6 and I7 with the circuit in Fig. 1.

It will thus be understood from the foregoing description that according to the present invention there is provided an amplifier circuit which can increase the variation range of the output current as compared with the conventional amplifier circuit. Consequently, a high-performance portable electronic equipment or device consuming less power can be easily realized.


Anspruch[de]
  1. Verstärkerschaltung mit:
    • einer Signalkonvertierungsschaltung (1) zum Konvertieren eines Eingangssignals in ein Stromsignal (I6);
    • einer Differenzstromerzeugungsschaltung (2) zum Erzeugen eines Differenzstroms zwischen einem vorbestimmten Stromwert (I7) und dem genannten Stromsignal (I6);
    • einer ersten Stromverstärkerschaltung (5), die einen Transistor mit einem ersten Polaritätstyp hat, zum Verstärken des Differenzstroms; und
    • einer zweiten Stromverstärkerschaltung (6), die einen Transistor mit einem zweiten Polaritätstyp hat, zum Verstärken des Differenzstroms,
       dadurch gekennzeichnet, daß

       ein Ausgangsanschluß der ersten Stromverstärkerschaltung (5) und ein Ausgangsanschluß der zweiten Stromverstärkerschaltung (6) miteinander verbunden sind und

       ein Eingangsanschluß der ersten Stromverstärkerschaltung (5) und ein Eingangsanschluß der zweiten Stromverstärkerschaltung (6) mit einem Ausgang der Differenzstromerzeugungsschaltung (2) verbunden sind.
  2. Verstärkerschaltung nach Anspruch 1, bei der die Signalkonvertierungsschaltung (1) einen Transistor (M6) enthält, das Eingangssignal auf die Steuerelektrode des Transistors angewendet wird und das Stromsignal (I6) von einer der gesteuerten Elektroden des Transistors (M6) ausgegeben wird.
  3. Verstärkerschaltung nach Anspruch 1 oder 2, bei der die Differenzstromerzeugungsschaltung (2) eine Konstantstromquelle umfaßt und die Differenz zwischen dem Stromwert (I7) der Konstantstromquelle und dem Stromsignal (I6) als der genannte Differenzstrom erzeugt wird.
  4. Verstärkerschaltung nach irgendeinem der Ansprüche 1 bis 3, bei der die erste Stromverstärkerschaltung (5) und die zweite Stromverstärkerschaltung (6) Stromspiegelschaltungen enthalten.
  5. Verstärkerschaltung nach irgendeinem der Ansprüche 1 bis 4, mit einer Stromvorspannungsregelungsschaltung, die mit dem Übergang zwischen der ersten Stromverstärkerschaltung (5) und der zweiten Stromverstärkerschaltung (6) verbunden ist.
  6. Verstärkerschaltung nach Anspruch 5, bei der die Stromvorspannungsregelungsschaltung Transistoren (MB1, MB2) enthält, deren Steuerelektroden mit einem Vorspannungssignal versehen werden.
  7. Verstärkerschaltung nach irgendeinem der Ansprüche 1 bis 4, bei der die Signalkonvertierungsschaltung (1) eine erste Signalkonvertierungsschaltung (M6) enthält, zum Konvertieren des Eingangssignals in ein erstes Stromsignal, und eine zweite Signalkonvertierungsschaltung (M6') zum Konvertieren des Eingangssignals in ein zweites Stromsignal;

       die Differenzstromerzeugungsschaltung (2) eine erste Differenzstromerzeugungsschaltung (M7) enthält, zum Erzeugen des ersten Differenzstroms zwischen einem ersten vorbestimmten Stromwert und dem ersten Stromsignal, und eine zweite Differenzstromerzeugungsschaltung (M7') zum Erzeugen des zweiten Differenzstroms zwischen einem zweiten vorbestimmten Stromwert und dem zweiten Stromsignal;

       die erste Stromverstärkerschaltung (5) den ersten Differenzstrom verstärkt; und

       die zweite Stromverstärkerschaltung (6) den zweiten Differenzstrom verstärkt.
Anspruch[en]
  1. An amplifier circuit comprising:
    • a signal conversion circuit (1) for converting an input signal into a current signal (I6);
    • a difference current generation circuit (2) for generating a difference current between a predetermined current value (I7) and said current signal (I6);
    • a first current amplifier circuit (5) having a transistor of a first polarity typ for amplifying said difference current; and
    • a second current amplifier circuit (6) having a transistor of a second polarity typ for amplifying said difference current,
       characterized in that

       an output terminal of said first current amplifier circuit (5) and an output terminal of said second current amplifier circuit (6) are connected to each other, and

       an input terminal of said first current amplifier circuit (5) and an input terminal of said second current amplifier circuit (6) are connected to an output of said difference current generation circuit (2).
  2. An amplifier circuit according to claim 1, wherein said signal conversion circuit (1) includes a transistor (M6), said input signal is applied to the control electrode of said transistor, and said current signal (I6) is output from one of the controlled electrodes of said transistor (M6).
  3. An amplifier circuit according to claim 1 or 2,

       wherein said difference current generation circuit (2) comprises a constant current source, and the difference between the current value (I7) of said constant current source and said current signal (I6) is generated as said difference current.
  4. An amplifier circuit according to any one of claims 1 to 3, wherein said first current amplifier circuit (5) and said second current amplifier circuit (6) include current mirror circuits.
  5. An amplifier circuit according to any one of claims 1 to 4, comprising a current bias regulation circuit connected to the junction between said first current amplifier circuit (5) and said second current amplifier circuit (6).
  6. An amplifier circuit according to claim 5, wherein said current bias regulation circuit includes transistors (MB1, MB2) having the control electrodes thereof provided with a bias signal.
  7. An amplifier circuit according to any one of claims 1 to 4, wherein said signal conversion circuit (1) includes a first signal conversion circuit (M6) for converting said input signal into a first current signal and a second signal conversion circuit (M6') for converting said input signal into a second current signal;

       said difference current generation circuit (2) includes a first difference current generation circuit (M7) for generating the first difference current between a first predetermined current value and said first current signal and a second difference current generation circuit (M7') for generating the second difference current between a second predetermined current value and said second current signal;

       said first current amplifier circuit (5) amplifies said first difference current; and

       said second current amplifier circuit (6) amplifies said second difference current.
Anspruch[fr]
  1. Circuit amplificateur comprenant :
    • un circuit de conversion de signal (1) pour convertir un signal d'entrée en un signal de courant (I6) ;
    • un circuit de génération de courant de différence (2) pour générer un courant de différence entre une valeur de courant prédéterminée (I7) et ledit signal de courant (I6) ;
    • un premier circuit amplificateur de courant (5) ayant un transistor d'un premier type de polarité pour amplifier ledit courant de différence : et
    • un second circuit amplificateur de courant (6) ayant un transistor d'un second type de polarité pour amplifier ledit courant de différence,
       caractérisé en ce que

       une borne de sortie dudit premier circuit amplificateur de courant (5) et une borne de sortie dudit second circuit amplificateur de courant (6) sont raccordées l'une à l'autre, et

       une borne d'entrée dudit premier circuit amplificateur de courant (5) et une borne d'entrée dudit second circuit amplificateur de courant (6) sont raccordées à une sortie dudit circuit de génération de courant de différence (2).
  2. Circuit amplificateur selon la revendication 1, dans lequel ledit circuit de conversion de signal (1) comprend un transistor (M6), ledit signal d'entrée est appliqué à l'électrode de commande dudit transistor, et ledit signal de courant (I6) est fourni par l'une des électrodes commandées dudit transistor (M6).
  3. Circuit amplificateur selon la revendication 1 ou 2, dans lequel ledit circuit de génération de courant de différence (2) comprend une source de courant constant, et la différence entre la valeur de courant (I7) de ladite source de courant constant et ledit signal de courant (I6) est générée comme ledit courant de différence.
  4. Circuit amplificateur selon l'une quelconque des revendications 1 à 3, dans lequel ledit premier circuit amplificateur de courant (5) et ledit second circuit amplificateur de courant (6) comprennent des circuits de miroir de courant.
  5. Circuit amplificateur selon l'une quelconque des revendications 1 à 4, comprenant un circuit de régulation de polarisation de courant raccordé à la jonction entre ledit premier circuit amplificateur de courant (5) et ledit second circuit amplificateur de courant (6).
  6. Circuit amplificateur selon la revendication 5, dans lequel ledit circuit de régulation de polarisation de courant comprend des transistors (MB1, MB2) ayant les électrodes de commande de ceux-ci recevant un signal de polarisation.
  7. Circuit amplificateur selon l'une quelconque des revendications 1 à 4, dans lequel ledit circuit de conversion de signal (1) comprend un premier circuit de conversion de signal (M6) pour convertir ledit signal d'entrée en un premier signal de courant et un second circuit de conversion de signal (M6') pour convertir ledit signal d'entrée en un second signal de courant ;

       ledit circuit de génération de courant de différence (2) comprend un premier circuit de génération de courant de différence (M7) pour générer le premier courant de différence entre une première valeur de courant prédéterminée et ledit premier signal de courant et un second circuit de génération de courant de différence (M7') pour générer le second courant de différence entre une seconde valeur de courant prédéterminée et ledit second signal de courant ;

       ledit premier circuit amplificateur de courant (5) amplifie ledit premier courant de différence ; et

       ledit second circuit amplificateur de courant (6) amplifie ledit second courant de différence.






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