Field of application
The present invention relates to a process for realizing microchannels
in an integrated structure.
More specifically, the invention relates to a process for realizing
microchannels buried in an integrated structure comprising a monocrystalline silicon
The invention relates particularly, but not exclusively, to a process
for realizing miniaturised microchannels buried in a completely monocrystalline
array and the following description is made with reference to this field of application
for convenience of illustration only.
As it is well known, microchannel arrays are widely used in different
systems such as medical systems for fluid administration, devices for biological
use for manufacturing miniaturised microreactors, in electrophoresis processes,
in ADN chip applications, in integrated fuel cells. Microchannels are used also,
for example, for the refrigeration of devices located above microchannels.
In order to form a microchannel system complex procedures are however
In particular the processes for forming these microchannels require
the so-called wafer bonding, the use of substrates for forming very deep trenches
or the front-back alignment to open structures from the wafer back.
A process for forming microchannels is described for example in the
US patent no. 6,376,291 granted on April 23, 2002 in the name of the Applicant herself.
In particular, this document describes a process for forming in a monocrystalline
silicon body an etching-aid region for the monocrystalline silicon wherein a nucleus
region is provided, surrounded by a protective structure and having a port extending
along the whole etching-aid region.
According to this document, a polycrystalline layer is grown above
the port in order to form a cavity completely embedded in the resulting wafer. Although
advantageous from many aspects, the process described by this document is rather
complex and it does not allow a completely crystalline final microstructure to be
The technical problem underlying the present invention is to provide
a process for forming microchannels, having such structural and functional characteristics
as to overcome the limits and drawbacks still affecting the processes according
to the prior art.
Summary of the invention
The solution idea underlying the present invention is to use trench
structures to obtain deep silicon cavities characterised by a small surface potr
as precursors for forming microchannels in an integrated structure, thus obtaining
a completely crystalline final structure.
On the basis of this solution idea the technical problem is solved
by a process for forming microchannels in an integrated structure as previously
described and defined in the characterising part of claim 1.
The features and advantages of the process according to the invention
will be apparent from the following description of an embodiment thereof given by
way of non-limiting example with reference to the attached drawings.
Brief description of the drawings
In the drawings:
- Figure 1 schematically shows a section of an integrated structure with at least
a microchannel realized with the process according to the invention;
- Figures 2, 3A, 3B, 4 are micrographies of the integrated structure of figure
1 in different steps of the process according to the invention;
- Figure 5 schematically shows an integrated structure with microchannels realized
according to an alternative embodiment of the process according to the invention;
- Figures 6A to 6F schematically show an integrated structure with microchannels
in different steps of a further alternative embodiment of the process according
to the invention;
- Figures 7A and 7B show micrographies of the final integrated structure with
microchannels realized with the process according to the invention.
With reference to the drawings, and particularly to Figure 1, an integrated
structure comprising a plurality of microchannels 10 formed according to the invention
is globally and schematically indicated with 1.
In particular, the integrated structure 1 comprises a monocrystalline
silicon substrate 2 whereon a monocrystalline silicon layer 3 is grown.
The monocrystalline silicon layer 3 is obtained in turn by epitaxial
growth on convenient cavities (rhombohedral in the example shown) of said microchannels
10 without using coverings.
Advantageously, according to the invention, microchannels 10 are completely
buried in the substrate 2 and the final integrated structure 1 is completely monocrystalline.
The steps of the process according to the invention for forming buried
microchannels 10 in a completely monocrystalline integrated structure 1 are now
described. As it will be seen in the following description, advantageously, according
to the invention, these miniaturised channels are completely obtained through surface
The process for forming buried microchannels 10 in an integrated structure
1 according to the invention comprises the steps of:
- providing a monocrystalline silicon substrate 2;
- forming on the substrate 2 surface a silicon nitride mask (Hard mask) through
a CVD deposition technique;
- opening of a window having a convenient width L through photolithographic systems
and following plasma etching.
In particular, as it is schematically shown in figure 2, above the
substrate 2 a window is opened having a width L of about 1 µm and a depth H of about
9 µm along the substrate 2 direction, indicated in figure with the arrow F.
Advantageously according to the invention, the process provides a
following plasma etching which uses the Hard mask to form deep trenches 4 in the
substrate 2, as shown in figure 2. Trenches 4 have side walls 4A and 4B which are
substantially orthogonal to the substrate 2 surface.
The resulting structure then undergoes a further anisotropic wet etching,
for example with a TMAH or KOH solution.
It is worth noting that solutions with different KOH or TMAH concentrations
etch the monocrystalline silicon of the substrate 2 with speeds which highly depend
on the crystallographic orientations and the dopant concentration of the substrate
2 itself. It is thus possible, by using a TMAH- or KOH-solution-etching, to form
highly controllable and reproducible tree-dimensional microchannels 10.
Advantageously according to the invention, trenches 4 are the precursors
of microchannels 10.
The integrated structure 1, after the anisotropic etching step, has
the shape shown in figures 3A and 3B, wherein a single microchannel or a plurality
of microchannels are shown respectively.
Advantageously according to the invention, the resulting microchannels
10 have a rhombohedral shape.
In particular, the original shape of trenches 4 (shown in figure 2)
turns into a pair of so-called rotated v-grooves V1 and V2, orthogonal to the surface
S of the substrate 2 and defining rombohedron-shaped microchannels 10, as shown
in figure 3A.
In other words, a bottleneck-shaped deep cavity is obtained, which
has a small port on the surface S of the substrate 2.
In practise, while the etching time passes, because of the presence
of a so-called under cut under the hard mask on the substrate 2 surface, microchannels
10 open upwardly changing the symmetry between the upper and lower part of their
cavity, as schematically shown in figure 4.
It is however possible, by limiting the etching time, to obtain conveniently-sized
microchannels by enlarging the depth of original trenches 4. In alternative, it
is possible to exploit the so-called etch stop effect by using as hard mask an heavily
doped monocrystalline layer, as schematically shown in figure 5, wherein the substrate
2 and microchannels 10 are covered by a heavily doped hard mask layer capable of
reducing under cut effects even when the substrate 2 etching time passes.
In a preferred embodiment, the layer 5 has a dopant concentration
(for example boron) higher than 1019 atoms/cm3.
It is also possible to use a predeposition on trench 4 walls of a
layer of material 6 having a low etching speed (as for example the nitride).
In particular, this alternative embodiment of the process according
to the invention provides a deposition of a nitride layer 6 followed by a plasma
etching effective to open a region 7 at the trench 4 base, as shown in figures 6A
The process for realizing buried microchannels 10 in an integrated
structure 1 according to this alternative embodiment of the invention comprises
the steps of:
- providing a monocrystalline silicon substrate 2;
- growing a monocrystalline silicon layer 3 above the substrate 2;
- forming a mask by means of a photoelectric film 8 above the monocrystalline
silicon layer 3, as schematically shown in figure 6A.
The process provides thus the steps of:
- opening a plurality of windows through photolithographic systems and following
plasma etching (figure 6B);
- forming a plurality of trenches 4 in correspondence with the plurality of windows
Advantageously this alternative embodiment of the process according
to the invention, provides therefore a deposition step of a nitride layer 6 (figure
6D), a removing step of the layer 6, an etching step of the silicon substrate in
a lower part 9 of trenches 4 (figure 6E) and a plasma etching step effective to
open a plurality of regions 7 at the trench 4 base (figure 6F).
In particular, the plasma etching step to open regions 7 at the trench
4 base is activated only in the area wherein the nitride layer 6 has been removed.
It is essentially a so-called SCREAM process, wherein trench 4 walls are protected
to localise the etching only under the trench base.
Even using this alternative embodiment of the process according to
the invention, deep regions 7 are thus obtained, which have however a small surface
opening in correspondence with the opening areas of trenches 4.
Advantageously according to the invention, trenches 4 are used for
an anisotropic etching effective to obtain rhombohedral microchannels. The shape
obtained is due to the different etching speeds of the different crystallographic
The side walls 4A and 4B of trenches 4 undergo the etching anisotropic
action and the erosion continues with different etching speeds due to the different
atom coordination (in terms of bond quantity of silicon atoms directed towards the
In particular, atoms on planes of the (100) type have coordination
two, i.e. two bonds directed towards the substrate, whereas atoms on planes of the
(111) type have coordination three, i.e. three bonds directed towards the bulk (that
is that they are more bonded).
Trenches 4 are directed along the directions (110) on the wafer surface
of the (100) type. Planes (111) find on the wafer surface just the direction (110)
and they are rotated with respect to the normal to the surface by 54,7°.
In particular two planes are present, which pass in the upper part
of trenches 4 and two planes passing in the lower part. All atoms along these directions
have coordination three.
Advantageously according to the invention, the process starts by eroding
the atoms having the lowest coordination which are characterised by a higher speed.
After reaching the directions of planes (111) passing through/from the upper part
and through/from the lower part of trenches 4, speed decreases by about a hundred
times since it finds only atoms with coordination three, therefore it continues
with the etching speed of planes (111) as shown in figures 3A and 3B. In particular,
a microchannel 10 opened towards the substrate 2 surface is obtained.
Advantageously, according to the invention, deep silicon cavities
are thus obtained, being characterised by a small surface port whereto it is possible
to apply a silicon deposition step to obtain a monocrystalline structure.
In other words, microchannels 10 have a bottle-section-shaped or rhomohedral
precursor (obtained as above described) which is easily closed epitaxially by using
oxides, polysilicons and other convenient materials.
Advantageously according to the invention, the process provides a
further epitaxial new growth step corresponding to the material used to close the
upper part of the microchannel 10, as shown in figure 7A. It is thus possible to
obtain completely buried monocrystalline silicon microchannels 10.
Figure 7B shows for completeness the channel profile before (10A)
and after (10B) the epitaxial new growth step. It happens thus that the monocrystalline
material deposition occurs consistently also inside the microchannel 10.
It is also possible to close the upper part of microchannels by using
other deposition techniques such as oxide or polysilicon or nitride deposition.
In conclusion, the process for realizing microchannels 10 buried in
an integrated structure 1 according to the invention allows, thanks to the resulting
etching form, the structure of the microchannel under the substrate 2 surface to
be enlarged, but to keep, at the same time, the etching port small by means of trenches
4. The surface microchannel closing is thus performed by growing epitaxially the
Finally, advantageously according to the invention, the integrated
structure 1 is completely epitaxial even above microchannels 10 and it is performed
by exploiting a deep cavity characterised by a small surface opening, which can
be obtained in several kinds of processes, as well as an easy epitaxial new growth
of this cavity.