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Dokumentenidentifikation EP1635183 03.01.2008
EP-Veröffentlichungsnummer 0001635183
Titel Vorrichtung zur Überwachung des Ruhestroms einer elektronischen Vorrichtung
Anmelder Q-Star Test N.V., Brugge, BE
Erfinder Manhaeve, Hans, 8200 Sint-Michiels, BE;
Kerckenaere, Stefan, 8480 Eernegem, BE;
Straka, Bohumil, 61300 Brno, CZ
Vertreter derzeit kein Vertreter bestellt
DE-Aktenzeichen 60223730
Vertragsstaaten BE, DE, FR, IT
Sprache des Dokument EN
EP-Anmeldetag 03.07.2002
EP-Aktenzeichen 050776731
EP-Offenlegungsdatum 15.03.2006
EP date of grant 21.11.2007
Veröffentlichungstag im Patentblatt 03.01.2008
IPC-Hauptklasse G01R 31/30(2006.01)A, F, I, 20060302, B, H, EP
IPC-Nebenklasse G01R 31/3173(2006.01)A, L, I, 20060302, B, H, EP   

Beschreibung[en]
Field of the invention

The present invention is related to a device for measuring the quiescent current (IDDQ) drawn by an electronic device, such as a CMOS device or an Integrated Circuit, when the device is powered by a supply voltage (VDD).

State of the art

Integrated circuits need to be thoroughly tested. The current drawn by a powered CMOS device or IC, when it is not in switching mode, is called the 'quiescent current', described by the symbol IDDQ. It is known that the value of this current is a very sensitive criterion for identifying possible malfunctioning of the IC. The detection of the IDDQ level, and the comparison of this level with a reference, allows a straightforward pass/fail decision to be made on the quality of the device under test. Several devices and methods for IDDQ measurement have been described so far.

  • Document EP-A-672911 describes an IDDQ test device for a CMOS device, said test device comprising a stabilized voltage source, and a current measurement circuit, which is coupled to said source.
  • Document WO-A-9815844 is related to a method for inspecting an integrated circuit, wherein the supply current is measured, by measuring the voltage over a segment of the supply line through which this supply current flows.
  • Document EP-A-811850 is related to a system for the measurement of a supply current of an electronic circuit, comprising a bypass switch with a dummy transistor to avoid charge transfer.
  • Document EP-A-1107013 is related to a device for testing a supply connection of an electronic device, said test device comprising a current mirror.

A problem of existing IDDQ-monitors is related to the sensitivity of these test devices. The background leakage current (IBackground Leakage) of deep sub-micron devices increases drastically as process technologies are decreasing in size and the number of transistors contributing to the background leakage is increasing drastically, whereas the order of magnitude of the defect current (IDefect Leakage) remains more or less constant: I Total Leakage = I Background Leakage + I Defect Leakage

In order to distinguish the small defect leakage component from the background leakage current, the measurement resolution must be very high throughout the measurement range of the monitor. People skilled in the art know that increasing the measurement range is always done at the expense of measurement resolution. Yet the resolution should remain constant as the defect leakage current remains constant. Existing IDDQ monitors do not offer a solution to this problem.

Document US6414511B1 discloses an arrangement for transient current testing of a CMOS circuit. In the article 'A fully digital controlled Off-Chip IDDQ measurement unit', Straka et al., 1998, a measurement unit is disclosed which exhibits reduced sensitivity to charge injection, due to an auxiliary circuit which reduces the peaks approximately 5 to 10 times in comparison with an uncompensated bypass switch.

In document USS914615, a method is disclosed for improving the quality and efficiency of IDDQ testing, by calculating an upper and a lower threshold value. However, none of the above three documents suggest a solution to the problem of high background leakage current.

Aims of the invention

The present invention aims to provide a device for IDDQ monitoring of electronic devices, which has a high resolution for higher IDDQ levels. The device of the application is capable of being used both in on-chip and off-chip applications.

Summary of the invention

The invention is related to a device for measuring the supply current (IDDQ) to an electronic device under test, which is powered by a supply voltage (VDUT), said measuring device being placed in a supply line between said supply voltage and said device under test, said measuring device comprising a current measuring unit or CMU, a current bypass unit or CBU in parallel to said CMU, characterized in that said measuring device further comprises an offset current device, said offset current device comprising a current source, for providing a constant offset current to said DUT.

Said current source is preferably programmable. It may be coupled in parallel to said current measuring unit, or it may be powered by a supply voltage (VDD) which is different from the DUT supply voltage (VDUT).

Any device according to the invention may further comprise a processing unit, which is in connection with said current measuring unit and with an output device and which is able to acquire an IDDQ measured value from the CMU, characterized in that the processing unit is able to perform processing actions on said measurement.

Said processing actions are preferably chosen from the group consisting of :

  • subtracting a measured IDDQ value from a reference value or vice versa,
  • comparing a measured IDDQ value with a reference value and producing a pass/fail signal on the basis of the result of said comparison,
  • subtracting a measured IDDQ value from a previously measured IDDQ value
  • comparing a calculated value, resulting from subtracting a measured IDDQ value from a previously measured IDDQ value or vice versa, or from subtracting a measured IDDQ value from a reference value or vice versa, with a reference value and producing a pass/fail signal on the basis of the result of said comparison.

A device of the invention may be separate from said device under test, or it may be incorporated into said device under test.

Short description of the drawings

Fig. 1 represents a schematic view of an IDDQ monitor according to the invention.

Fig. 2a and 2b represent schematic views of two embodiments of the current offset unit according to the invention.

Fig. 3 represents a graph, illustrating the application of a virtual measurement window to the leakage current, by using a monitor according to the invention.

Figures 4 to 7 illustrate different off-chip and on-chip embodiments of a device according to the invention.

Detailed description of the invention

Figure 1 illustrates a schematic view of an IDDQ monitoring device or simply named 'monitor' 1, according to the invention. In this figure, the monitor is represented as a separate device, which can for example be incorporated into the test equipment, as a load-board application. It is emphasized that the same monitor can be designed as an on-chip device.

The monitor 1 is connected by two terminals 2 and 3, between a supply voltage source 4, and the Device-Under-Test DUT 5. The supply voltage VDUT at the terminal 2 should be present also, with a minimum error, on the terminal 3, in order to create a maximum transparency of the monitor 1.

The measurement of the IDDQ is performed by the current measuring unit CMU 6, during a non-switching state of the DUT. Test vectors 7 are applied to the DUT at a given clock frequency, by the test equipment 8. The CMU 6 may be a unit working according to the stabilized voltage source principle or any other prior art measurement method. A current bypass unit CBU 20 is placed parallel to the CMU 6. The CBU 20 preferably comprises a power MOSFET which can be closed prior to the occurrence of the transient peak resulting from the DUT's switching action. This transient peak occurs when a test vector is applied to the DUT or when the application of a clock cycle of the DUT's operational clock causes the DUT to change state. In between transient peaks and for the desired measurement states, the MOSFET is normally opened in order to send the quiescent current IDDQ through the current measuring unit CMU 6.

The operation of the CBU 20 and the Offset Current Unit (OCU) 21, said OCU being characteristic to the invention and described further, is controlled by the processing unit 9, via control signals 10 and 11. In particular, the PU 9 controls the opening and closing of the MOSFET incorporated in the CBU 20, on the basis of a clock signal derived from the clock with which the DUT is operated. The clock applied to the CBU is dependent on the relevant measurement sequence : there is not necessarily a measurement during every clock cycle of the DUT. When in measurement mode, the current measuring unit performs an IDDQ measurement, during a non-switching period of the DUT and delivers a signal 12 related to the IDDQ level, to the processing unit 9, which digitises the signal, and transmits it via the terminal 13, to the test equipment 8.

The test equipment 8 controls the processing unit 9, and processes the monitor's output 12, so that the result of the IDDQ measurement is displayed on a screen. In the preferred set-up, the source 4 is not separate, and the supply voltage VDUT is equally supplied by the test equipment 8. The displayed result is at least a pass/fail statement based on the comparison between the measured IDDQ value and a predefined reference, often completed by the measured value of IDDQ. Other measurement modes can be selected when using the preferred version of the processing unit 9. For example : the measurement of current signatures or a delta IDDQ measurement mode wherein subsequent measurements are subtracted and the delta-values obtained are memorized and compared to a reference.

According to a preferred embodiment of the invention, the PU 9 itself performs the processing of the incoming signals, for example the subtraction of two subsequent IDDQ measurement values, before a result is transferred to the test equipment 8. Some examples of measurement modes, performed by a PU according to this embodiment, are given further in this description.

Block 21 shown in figure 1 is the characteristic element of the invention. This is the Offset Current Unit (OCU). As the large background leakage current does not contain any defect information, it is not practical to measure this component of the leakage current. In practice, the background leakage current can be of the order of 100mA, while the defect-related leakage current IDDQdefect is typically between 0 and 10mA. The background leakage component can therefore be regarded as an offset current (IDDQOffset). The total quiescent current IDDQ is the sum of both previously described components. I DDQ = I DDQBackground + I DDQDefect

Measuring the totality of this IDDQ current, requires a CMU with a high dynamic range, and thus reduced sensitivity. As stated above, this is a growing problem, due to increasing background leakage current in submicron devices, while the defect leakage current remains of the same order. The total IDDQ level becomes too high for a current measuring unit, having a high resolution, as is desired for reasons of accuracy. It would therefore be advantageous if only the defect leakage component is measured. As shown schematically in figure 2, the OCU 21 is actually a current source 40, delivering an essentially fixed offset current into the supply line to the DUT. The current source will deliver a given offset current level IDDQoffset to the summing node 41, so that only the IDDQ above this level is drawn from the current measuring unit 6. In that way a flexible virtual measurement window (VMW) 42 is created with a high measurement resolution (figure 3). The offset current source is preferably a programmable current source. The offset level 43 which is delivered as an offset current is programmable and variable during the measurement. It is basically controlled by the operator of the test equipment, through the processing unit 8. Two embodiments are considered, as shown in figures 2a and 2b. In figure 2a, the current source 40 is connected to the supply voltage VDUT, placing the OCU in parallel to the CMU. However, a parallel connection is not necessary. The offset current unit may for example be connected to the device supply voltage VDD (figure 2b). Autoranging sequences are preferably performed prior to applying a series of test vectors, in order to establish the optimal level of the applied offset current. For this purpose, a programmable current source 40 is preferably used.

The offset current unit 21, possibly in combination with a compensated switch 20 according to EP application No. 02447125.2 , can be applied in various ways. In the off-chip current measurement domain, the programmable current source 21 can be implemented either as a stand-alone module (figure 4) or it can be part of the off-chip current monitor 100 (figure 5). The block 100 in figures 4 to 7 represents an IDDQ monitor with a CMU 6, and preferably with a CBU 20 according to EP application No. 02447125.2 . The off-chip current monitor architecture is of no importance to the windowing concept. In the on-chip domain, again the offset current unit 21 can be an add-on core to the Built-In Current Sensor (BICS) (figure 6) or be part of the BICS itself (figure 7). The BICS architecture is of no importance to the concept. In all embodiments shown in figures 4-7, the dotted line delineates what is to be understood as the device 1 of the invention.

The (programmable) current source can be controlled by the ATE 8 (figures 4a, 5a, 6a, 7a) or by the on-chip/off-chip IDDQ monitor (figures 4b, 5b, 6b, 7b) and although it is not necessary, the offset current unit can be part of a auto-windowing procedure.

Examples of measurement modes performed by the Processing Unit.

The following measurement modes comprise calculations which are performed by the processing unit itself. Results of calculations (subtraction of IDDQ values, comparison results) are transferred to the ATE 8 which may further process them or display the results on a screen.

  • Standard IDDQ mode - IDDQ measurements are made and compared against one predefined reference value resulting in a pass/fail result. Pass = measurement is below reference, Fail = measurement is above reference.
  • Current signatures - this is a special version of the standard IDDQ mode, for a current signature approach, IDDQ measurements are made and compared against a predefined vector related pass/fail reference, resulting in a pass/fail result.
  • Standard Delta-IDDQ mode (vector-to-vector delta) - IDDQ measurements are made, subsequent measurements are subtracted from each other (delta calculation). The measurement is preferably but not necessarily compared against a predefined absolute reference and the calculated delta is compared against a predefined delta reference value, resulting in a pass/fail result. Delta as well as absolute reference(s) can be set either globally or on a vector-to-vector basis.
  • Vector to reference vector Delta-IDDQ mode - A reference vector is selected of which the related IDDQ measurement serves as reference for the following measurements. Typically the reference vector is the first IDDQ vector (this situation is supported by the standard vector to reference vector delta IDDQ mode firmware). IDDQ measurements are then made, the measurement result of each subsequent measurement is subtracted from the reference value gathered during the reference vector measurement (delta calculation). The measurement is preferably but not necessarily compared against a predefined absolute reference and the calculated delta is compared against a predefined delta reference value, resulting in a pass/fail result. Delta as well as absolute reference(s) can be set either globally or on a vector-to-vector basis.
  • Pre and Post stress Delta-IDDQ mode - A first set of IDDQ measurements are made (pre stress), then stress is applied to the device under test, followed by a second set of IDDQ measurements (post stress). The results from the corresponding pre and post stress measurements are subtracted (delta calculation). The measurement is preferably but not necessarily compared against a predefined absolute reference and the calculated delta is compared against a predefined delta reference value, resulting in a pass/fail result. Delta as well as absolute reference(s) can be set either globally or on a vector to vector basis


Anspruch[de]
Vorrichtung (1) zum Messen des Versorgungsstroms (IDDQ) zu einer einer Prüfung unterzogenen elektrischen Vorrichtung (5), die durch eine Versorgungsspannung (VDUT) betrieben wird, wobei die Messvorrichtung (1) in einer Versorgungsleitung zwischen der Versorgungsspannung und der der Prüfung unterzogenen Vorrichtung (5) angeordnet ist, wobei die Messvorrichtung eine Strommesseinheit, CMU (6), und eine mit der CMU, parallel geschaltete Stromumleitungseinheit, CBU (20), umfasst, dadurch gekennzeichnet, dass die Messvorrichtung (1) ferner eine Offsetstromvorrichtung (21) umfasst, wobei die Offsetstromvorrichtung eine Stromquelle (40) zur Bereitstellung eines konstanten Offsetstroms zur DUT (5) umfasst. Vorrichtung nach Anspruch 1, wobei die Stromquelle (40) programmierbar ist. Vorrichtung nach Anspruch 1 oder 2, wobei die Stromquelle mit der Strommesseinheit (6) in Parallelschaltung verbunden ist. Vorrichtung nach Anspruch 1 oder 2, wobei die Stromquelle durch eine Versorgungsspannung (VDD) betrieben ist, die eine andere ist als die DUT-Versorgungsspannung (VDUT). Vorrichtung nach Anspruch 1, ferner umfassend eine Verarbeitungseinheit (9), die mit der Strommesseinheit (6) und einer Ausgabevorrichtung (8) in Verbindung steht und die imstande ist, einen gemessenen IDDQ-Wert von der CMU (6) zu erfassen, dadurch gekennzeichnet, dass die Verarbeitungseinheit imstande ist, Verarbeitungstätigkeiten auf dem Messwert auszuführen. Vorrichtung nach Anspruch 5, wobei die Verarbeitungstätigkeiten vorzugsweise aus der aus Folgendem bestehenden Gruppe ausgewählt sind: - das Abziehen eines gemessenen IDDQ-Werts von einem Referenzwert oder umgekehrt, - das Vergleichen eines gemessenen IDDQ-Werts mit einem Referenzwert und das Erzeugen eines Gut-/Schlecht-Signals auf der Grundlage des Ergebnisses des Vergleichs; - das Abziehen eines gemessenen IDDQ-Werts von einem zuvor gemessenen IDDQ-Wert, - das Vergleichen eines berechneten Werts, der durch das Abziehen eines gemessenen IDDQ-Werts von einem zuvor gemessenen IDDQ-Wert oder umgekehrt oder durch das Abziehen eines gemessenen IDDQ-Werts von einem Referenzwert oder umgekehrt erhalten wurde, mit einem Referenzwert und das Erzeugen eines Gut-/Schlecht-Signals auf der Grundlage des Ergebnisses des Vergleichs. Vorrichtung nach einem der Ansprüche 1 bis 6, wobei die Vorrichtung getrennt von der der Prüfung unterzogenen Vorrichtung vorliegt. Vorrichtung nach einem der Ansprüche 1 bis 6, wobei die Vorrichtung in der der Prüfung unterzogenen Vorrichtung eingebaut ist.
Anspruch[en]
A device (1) for measuring the supply current (IDDQ) to an electronic device under test (5), which is powered by a supply voltage (VDUT), said measuring device (1) being placed in a supply line between said supply voltage and said device under test (5), said measuring device comprising a current measuring unit, CMU (6), a current bypass unit, CBU (20), in parallel to said CMU, characterized in that said measuring device (1) further comprises an offset current device (21), said offset current device comprising a current source (40), for providing a constant offset current to said DUT (5). A device according to claim 1, wherein said current source (40) is programmable. A device according to claim 1 or 2, wherein said current source is coupled in parallel to said current measuring unit (6). A device according to claim 1 or 2, wherein said current source is powered by a supply voltage (VDD) which is different from the DUT supply voltage (VDUT). The device according to claim 1, further comprising a processing unit (9), which is in connection with said current measuring unit (6) and with an output device (8), and which is able to acquire an IDDQ measured value from the CMU (6), characterized in that the processing unit is able to perform processing actions on said measurement. The device according to claim 5, wherein said processing actions are chosen from the group consisting of : - subtracting a measured IDDQ value from a reference value or vice versa, - comparing a measured IDDQ value with a reference value and producing a pass/fail signal on the basis of the result of said comparison, - subtracting a measured IDDQ value from a previously measured IDDQ value - comparing a calculated value, resulting from subtracting a measured IDDQ value from a previously measured IDDQ value or vice versa, or from subtracting a measured IDDQ value from a reference value or vice versa, with a reference value and producing a pass/fail signal on the basis of the result of said comparison. A device according to any one of claims 1 to 6, wherein said device is separate from said device under test. A device according to any one of claims 1 to 6, wherein said device is incorporated into said device under test.
Anspruch[fr]
Dispositif (1) pour mesurer le courant d'alimentation (IDDQ) vers un dispositif électronique soumis à un test (5), lequel est alimenté par une tension d'alimentation (VDUT), ledit dispositif de mesure (1) étant placé dans une ligne alimentation entre ladite tension d'alimentation et ledit dispositif soumis à un test (5), ledit dispositif de mesure comprenant une unité de mesure de courant, CMU (6), une unité de contournement de courant, CBU (20), connectée en parallèle avec ladite CMU, caractérisé en ce que ledit dispositif de mesure (1) comprend en outre un dispositif de courant décalé (21), ledit dispositif de courant décalé comprenant une source de courant (40), pour délivrer un courant décalé constant audit DUT (5). Dispositif selon la revendication 1, dans lequel ladite source de courant (40) est programmable. Dispositif selon la revendication 1 ou la revendication 2, dans lequel ladite source de courant est couplée en parallèle à ladite unité de mesure de courant (6). Dispositif selon la revendication 1 ou la revendication 2, dans lequel ladite source de courant est alimentée par une tension d'alimentation (VDD) qui est différente de la tension d'alimentation du DUT (VDUT). Dispositif selon la revendication 1, comprenant en outre une unité de traitement (9), laquelle est connectée avec ladite unité de mesure de courant (6) et avec un dispositif de sortie (8), et laquelle peut acquérir une valeur mesurée IDDQ depuis la CMU (6), caractérisé en ce que l'unité de traitement peut exécuter des actions de traitement sur ladite mesure. Dispositif selon la revendication 5, dans lequel lesdites actions de traitement sont choisies dans le groupe comprenant les actions consistant à : - soustraire une valeur IDDQ mesurée d'une valeur de référence ou vice versa ; - comparer une valeur IDDQ mesurée à une valeur de référence, et produire un signal de réussite/d'échec sur la base du résultat de ladite comparaison ; - soustraire une valeur IDDQ mesurée d'une valeur IDDQ préalablement mesurée ; - comparer une valeur calculée, résultant de la soustraction d'une valeur IDDQ mesurée d'une valeur IDDQ préalablement mesurée ou vice versa, ou résultant de la soustraction d'une valeur IDDQ mesurée d'une valeur de référence ou vice versa, à une valeur de référence, et produire un signal de réussite/d'échec sur la base du résultat de ladite comparaison. Dispositif selon l'une quelconque des revendications 1 à 6, dans lequel ledit dispositif est séparé dudit dispositif soumis à un test. Dispositif selon l'une quelconque des revendications 1 à 6, dans lequel ledit dispositif est intégré dans ledit dispositif soumis à un test.






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